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runtime_library:drivers:start [2020/12/10 19:46] – [Zynq7000] ursgraf | runtime_library:drivers:start [2023/03/23 09:50] (current) – [Zynq7000] ursgraf | ||
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===== Zynq7000 ===== | ===== Zynq7000 ===== | ||
+ | There are many device drivers for the internal hardware of the Zynq7000 processor and external hardware connected to it. When designing external electronics for the Zynq7000 processor and notably for the [[https:// | ||
+ | |||
==== flink Devices ==== | ==== flink Devices ==== | ||
The Zynq7000 incorporates a configurable programmable logic (PL) block, which is an FPGA. We support the configuration of the PL with [[https:// | The Zynq7000 incorporates a configurable programmable logic (PL) block, which is an FPGA. We support the configuration of the PL with [[https:// | ||
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* DAC (digital to analog converter) | * DAC (digital to analog converter) | ||
* ADC (analog to digital converter) | * ADC (analog to digital converter) | ||
+ | * UART | ||
* Watchdog | * Watchdog | ||
See [[https:// | See [[https:// | ||
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System.err = System.out; | System.err = System.out; | ||
</ | </ | ||
- | We offer a dedicated driver '' | + | We offer a dedicated driver '' |
+ | More UARTs are available as flink devices, see above. | ||
+ | |||
+ | ==== XADC ==== | ||
+ | The Zynq7000 processor incorporates an ADC (XADC). When measuring unipolar analog input signals, the differential analog inputs (VP and VN) have an input range of 0V to 1.0V. The voltage on VP (measured with respect to VN) must always be positive. VN is typically connected to a local ground. Because the differential input range is from 0V to 1.0V (VP to VN), the maximum signal on VP is 1.0V. | ||
+ | |||
+ | ==== Support for In-House Hardware ==== | ||
+ | Several dedicated drivers exist for in-house hardware like our control board ('' | ||
===== mpc555 ===== | ===== mpc555 ===== | ||
==== Digital I/O’s ==== | ==== Digital I/O’s ==== |