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| first_example_microzed_deploy [2020/12/01 14:19] – [Step by Step Instructions] ursgraf | first_example_microzed_deploy [Unknown date] (current) – removed - external edit (Unknown date) 127.0.0.1 | ||
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| - | ====== Deploying ====== | ||
| - | <box green 100%> | ||
| - | As soon as you are done with your development, | ||
| - | </ | ||
| - | |||
| - | The application together with the configuration of the FPGA is loaded upon power-up from the flash device. What must be done using this method? | ||
| - | |||
| - | ===== Step by Step Instructions ===== | ||
| - | - Set the jumpers on your MicroZed board as follows \\ {{ : | ||
| - | - Cycle the power. The settings of the jumpers will be read only at power-on! Hence, make sure to cycle the supply power after changing the jumper settings. A soft reset (through the JTAG or by pressing the reset button on the board will reset the board but will not sample the boot mode pins connected to the jumpers. | ||
| - | - Create a deep project and setup the project configuration as given in [[first_example_microzed|Hello World on the Avnet MicroZed Board]]. | ||
| - | - Do not specify a configuration for the FPGA part, as it will be loaded from flash. you must select a configuration file for the PL. \\ {{ :: | ||
| - | - When creating the run configuration, | ||
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| - | ===== How Does the System Boot? ===== | ||
| - | - reset (by JTAG) | ||
| - | - load and run first stage boot loader from flash | ||
| - | - configuration of PLL, clocks, DDR by host system | ||
| - | - load PL | ||
| - | - handoff to JTAG | ||
| - | - halt | ||
| - | - reset REBOOT_STATUS register | ||
| - | - download of bin-files to OCM and DDR | ||
| - | - download of bit-file (if specified) | ||
| - | - start at address 0x100 | ||